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Faraday reveals Uranus IoT development platform

Steve Rogerson
October 25, 2016



Faraday Technology has introduced a 55nm ultra-low-power SoC development platform for IoT applications. Called Uranus, it is the latest member of the Taiwanese company’s MCU-based SoC development platform series.
 
The platform uses the company’s PowerSlash IP, USB 2.0 interface, 12bit eight-channel ADC, 10bit DAC, embedded flash memory, and SDK support, aiming to demonstrate the next level of IoT chip power saving.
 
The goal is to reduce the time to market of system products by allowing early software design ahead of chip availability. It provides an integrated environment consisting of mainstream processor core, pre-verified Faraday interface and fabric IP, along with SDK, upon which system software may be built.
 
Further on, it demonstrates DVFS power modes management to balance trade-offs between performance and power consumption. In particular, its turbo mode alters the trade-off point to enable MCU core achieve double the performance under a given power constraint.
 
"As the driver of ASIC design service innovations, Faraday's SoC development platform series aims not only to help customer's chip design but also its system development," said Steve Wang, president of Faraday. "Satisfying both ultra-low-power and high-performance needs has become the key for next-generation IoT chip design. We proudly present Uranus, the newest member of our platform series, to provide the right tool for achieving that goal."
 
Faraday Technology is an ASIC design service and IP provider. The silicon IP portfolio includes IO, cell library, memory compiler, ARM-compliant CPUs, DDR2/3/4, low-power DDR1/2/3, Mipi, V-by-one, MPeg4, H.264, USB 2.0/3.1 Gen 1, 10/100/1000 Ethernet, Serial ATA, PCI Express, and programmable serdes.
 
Headquartered in Taiwan, the company has service and support offices around the world, including the USA, Japan, Europe and China.