Was Intel eyeing the Stratix 10 when it made its move for Altera?
June 10, 2015
Could Altera’s Stratix 10 be the jewel that Intel wanted when it announced last week’s planned US$16.7bn purchase of the California company? Even though details of the FPGAs and SoCs were only made public this week, Intel has known about them for some time – they use Intel technology and Intel is the exclusive foundry for Altera and thus has access to its roadmap.
The Stratix 10 is a major step up from previous Altera products and it is targeted right at data centres and IoT infrastructure applications, the area that Intel is desperate to dominate as its core PC business slides.
“The largest markets for Intel’s MPU solutions are CPUs for portable PCs and tablets, desktop PCs, notebooks, servers and high-performance computing platforms,” said Tom Hackenberg, principal analyst at IHS. “In the last several years, demand has stagnated for desktop PCs and the forecast for portable PCs has begun to slow. Much of this market sluggishness has been related to the introduction of more portable computing platforms, such as smartphones and tablets. IHS predicts that the tablet market is entering a saturation phase, with larger sizes also entering a slowing growth. More relevant to the Altera purchase, Intel supplies a host of integrated chip solutions to many markets beyond computers, and it is in many of these markets that Intel has the most potential for continued growth.”
The Stratix 10 devices are claimed to deliver breakthrough levels of performance, integration, density and security.
“This is the most significant step forward on a high-end FPGA that I have seen,” said Chris Balough, senior director at Altera. “It sets it on its own in the competitive landscape. This is truly the king of the FPGAs.”
The core fabric performance averages at double that of previous devices and can be up to five times more powerful. Key to that is the company’s HyperFlex architecture built on Intel’s 14nm tri-gate technology.
Other key figures include 5.5 million logic elements. “That is five times the size of the previous best,” said Balough. And it is based on quad-core ARM Cortex-A53 processors.
“It also has 10Tflops on a single piece of silicon,” said Balough. “That is a pretty impressive number.”
These are the first devices to leverage the company’s HyperFlex architecture, which introduces registers throughout all core interconnect routing segments, enabling the FPGAs and SoCs to benefit from register retiming, pipelining and other design optimisation techniques. Designers can eliminate critical paths and routing delays, and rapidly close timing on their designs.
All members of the family use heterogeneous 3D SiP integration to integrate a high-density monolithic FPGA core fabric with other advanced components, thereby increasing the scalability and flexibility. A monolithic core fabric increases device use and performance by avoiding connectivity issues when using multiple FPGA die to deliver higher densities. This has been enabled through the use of Intel’s proprietary EMIB (embedded multi-die interconnect bridge) technology, which provides higher performance, reduced complexity, lower cost and enhanced signal integrity compared with interposer-based approaches.
“EMID is one of the key secrets in how we got to 5.5 million logic elements,” said Balough.
Initial devices will use EMIB to integrate high-speed serial transceiver and protocol tiles with monolithic core logic. Implementing high-speed protocols and transceivers through a heterogeneous 3D SiP approach will allow the company to deliver variants that address evolving market demands. For example, the use of heterogeneous 3D SiP integration provides Stratix 10 devices with a path to support higher transceiver rates (56Gbit/s), emerging modulation formats (Pam-4), communications standards (PCIe gen 4 and multi-port Ethernet), and other capabilities such as analogue or high-bandwidth memory.
At its core is the SDM secure design manager, which delivers sector-based authentication and encryption, multi-factor authentication and physically unclonable function (PUF) technology. Altera has partnered with Athena Group and Intrinsic ID to deliver encryption acceleration and PUF IP for Stratix 10 FPGAs and SoCs. This level of security makes them suitable for use in military, cloud security and IoT infrastructure, where multi-layered security and partitioned IP protection are paramount.
“Security is a growing, deadly rising tide that has moved beyond defence,” said Balough.